python (65.2k questions)
javascript (44.3k questions)
reactjs (22.7k questions)
java (20.8k questions)
c# (17.4k questions)
html (16.3k questions)
r (13.7k questions)
android (13k questions)
How to access XDMA BAR0 in Petalinux?
I have a block design and hardware configuration with a Zynq processor running Petalinux. I furthermore have an XDMA IP configured as a memory-mapped endpoint. I have configured BAR0 and BAR2 in the P...

Hedam
Votes: 0
Answers: 1
Machine state does not change output
As you can see in the code below, I have a machine state with a state called start. This state should take the value of coord_x_reg , increment it by one and assign it to the output port using the ass...

Ginés Díaz
Votes: 0
Answers: 1
unable to compile application project on sdk 2019.1
I made hw design on vivado 2019.1 and i build application project on sdk 2019.1 based on .hdf file.
(My design consists of microblaze mcs)
i have 2 static libraries too .
When i try to compile main() ...
Yonatan Elizarov
Votes: 0
Answers: 0
why there is a overlapped output at putty while calling a function is written using xuartps.h to send data to uart in normal mode in zynq?
I am trying to send data from zynq soc 7000 board to pc using uart through a function (driver xuartps.h). within the main program, the code works but calling it from function, output at putty gets ove...
Roy
Votes: 0
Answers: 1