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VHDL count and shift
8-bit input value is transferred from Data to A when load is 1. And when S becomes 1, if A(0) is 1, the value of B is increased by 1, and A is shift right. When the value of A becomes 00000000, we mak...
Phil
Votes: 0
Answers: 1
I think it is a bug. ModelSim cannot be called from Quartus on Ubuntu
I have Quartus Prime Lite 21.1 installed on Ubuntu 20.04 and it is working fine.
I also have ModelSim 20.1.1 and it is working fine
I've put the right path to ModelSim on Quartus Prime, and it can ...
domvito55
Votes: 0
Answers: 2
Simulation Waveform in Intel Questas_fse/Quartus II doesn't update outputs
I'm attempting to run Quartus II (
Quartus Prime Version 21.1.0 Build 842 10/21/2021 Sj Lite Edition) on linux Pop OS 21.10.
I fail to produce result on output from Questas simulation run from the Sim...
NRagot
Votes: 0
Answers: 1
How to use only one ADC channel on MAX10
I have an ADC core
component adc_qsys is
port (
adc_1_command_valid : in std_logic := '0';
adc_1_command_channel : in std_logic_vector(4 dow...
john7
Votes: 0
Answers: 1