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Questions - iverilog

Iverilog include file can't find and modules are missing

I write Makefile to compile my current project. But the including file and module in testbench can't be found. The error information makefile source list It will work if I put all the source files ...
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Vayne

compilation

verilog

iverilog

Votes: 0

Answers: 1

Latest Answer

This question has been fixed by adding +incdir enter image description here
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Vayne

Verilog Error: "Syntax in assignment statement l-value." when writing a simple alu

I am having trouble finding the syntax error in this code of a simple simulator of MIPS alu functions. The error appears in the else of the case 6'b001000: // addi: ALU_.v:112: syntax error ALU_.v:11...
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wastecvd

syntax-error

verilog

iverilog

Votes: 0

Answers: 1

Latest Answer

There are two coding errors: Fix them this way This was a bad nor expression regC = ~(regA | regB) ; Was missing begin/end pairs Like this if(rt) begin regC = $signed(regA) + $signed(signeximm...
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Mikef

Are recursive functions in Verilog synthesizable?

Functions which do not contain any delay assignments are synthesizable, hence all synthesized functions are combinational in nature. Will the function still remain synthesizable if we have a recursive...
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j_robot

recursion

verilog

iverilog

Votes: 0

Answers: 1

Latest Answer

Yes, recursive function can be synthesizable, but only if the depth of recursion can be determined at compile time. That usually means the arguments to each top-level call to the function are constant...
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dave_59

I am trying use the output of a 16-bit encoder as to give input to the register (PIPO)

I am trying use the output of a 16-bit encoder as to give input to the register(PIPO). The 16-bit encoder will give 4-bit binary output; these 4-bit binary output will be given as input to the registe...
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Sobebar Ali

verilog

test-bench

iverilog

Votes: 0

Answers: 2

Latest Answer

The error message tells you that you must not assign values to pipo_in in the testbench because you connected it to a module instance output. You also must not declare it as a reg; change it to a wir...
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toolic

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