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Questions - instruction-encoding

How do you understand 'REX.W + B8+ rd io' form for x86-64 assembly?

I was originally trying to generate the bytes for an immediate move into a 64 bit register.The specific operation I wanted was mov rdi, 0x1337 Using https://www.felixcloutier.com/x86/mov, the only no...
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Happy Jerry

assembly

x86-64

nasm

machine-code

instruction-encoding

Votes: 0

Answers: 1

Latest Answer

B8+ rd means the operand (a register) is encoded in the low 3 bits of the opcode, not in a ModR/M byte. From the Intel Software Developer's Manual, +rb, +rw, +rd, +ro — Indicated the lower 3 bits of ...
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harold

Intel Reference Specification Questions

I'm looking at the ADD instruction, and there are so many things I don't have an idea what they mean. The gaps I have are. In the Opcode column what is /0 and /r? I understand the number is the opc...
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christopher clark

assembly

x86

intel

instruction-set

instruction-encoding

Votes: 0

Answers: 0

ARMv7 T3 encoding for adds

I can't tell how to determine the following: i, 10th bit on the left. imm3, what's the difference for this one with imm8?
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Mzq

assembly

arm

thumb

immediate-operand

instruction-encoding

Votes: 0

Answers: 1

Latest Answer

The fields i and imm3 apply a transformation to the imm8 constant in order to generate more 32 bit constants. Here is the official documentation which sadly doesn't explain much. There is also a post ...
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Homer512

Assembly to binary

I am trying to convert lw $t3, 12($t0) to binary but I am stuck. I am not very familiar with base register addressing. I know that lw is opcode 100011 and that $t3 is rt, and that the 12 represents th...
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user17442276

assembly

mips

cpu-registers

instruction-encoding

Votes: 0

Answers: 0

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