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Questions - iommu

How to configure IOMMU protection for my hypervisor?

I'm developing my own bare-metal hypervisor over intel vt-x technology. My goal is to make it inaccessible to the OS I'm running over my hypervisor in any way, therefore I configured an EPT table to p...
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matank001

x86

intel

hypervisor

iommu

vt-x

Votes: 0

Answers: 2

Latest Answer

EPT limits access from CPU only, so you are right: you are missing protection from DMA accesses. In order to operate IOMMU, you should search the ACPI. Look for a structure with signature DMAR (Intel...
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user10328353

PCIe DMA aarch64 0x10 Translation Fault

I'm trying to write a PCIe driver to DMA pages from the host memory to an FPGA. My host setup is Cavium ThunderX2 and my FPGAs are Xilinx Alveo U50. A DMA from/to the host causes the ARM SMMU v3.4 to ...
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Naarayanan_Rao

linux-device-driver

arm64

dma

pci-e

iommu

Votes: 0

Answers: 1

Latest Answer

I was able to fix the issue. There was a synchronization lapse between the IOMMU and the DMA mapping. There were no valid descriptors found for the mapped DMA addresses in the SMMU. I used dma_alloc_c...
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Naarayanan_Rao

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