1 year ago

#352745

test-img

PaulR

SysTick interrupt doesnt trigger (Arm Cortex M0)

I'm using a PGA970 with a ARM Cortex M0 and I'm struggling with the basic function of its SysTick interrupt. Neither Texas Instruments nor Arm could help me as they each ask me to consult the other. My current state is this:

void main(void) {  
  Interrupt_Config();
  __set_PRIMASK(0);                     //Enables Interrupts
  SYST_Config(0x0000004F,0x00000007);   //configures Reload value + enables counting
  while(1) {}                             //stay in main and wait for Interrupt
}

with this definition:

void Interrupt_Config(void)
{
   /* Clear interrupt pending register */
   NVIC_UNPEND0 = 0xFFFFFFFF;

   /* Set priority of NVIC interrupt */
   NVIC_PRI0 = 0x80400000;
   NVIC_PRI1 = 0xC0C0C0C0;

   /*
    * Enable NVIC interrupts
    * NVIC interrupt for external interrupt 1 i.e. TADC is disabled
    */
   NVIC_ENABLE0 = 0xFFFFFFFD;
}

According to Ti priority of SysTick is set to -1 with the highest priority being -3 (used by fault handlers). Custom interrupts start with the priority of 1.

SysTick M0 System Timer SysTick Registers:

  • SYST_CSR 0x00000007 SysTick Control and Status Register [Memory Mapped]
  • SYST_RVR 0x0000004F SysTick Reload Value Register [Memory Mapped]
  • SYST_CVR 0x00000000 SysTick Current Value Register [Memory Mapped]

These are my SysTick registers. The CSR register is enabled by setting the value of 7. When the Current Value Register hits 0 it gets reset to the Reload Value which is defined in the RVR. When this reload happens the Countflag-Bit in the CSR is set to 1. Everything of this is working as described in my case.

After the Countflag-Bit is set, an interrupt should be triggered executing the Syst_Handler as shown below. Since I'm using it as a basic counter for now I can confirm that it never gets called.

int SYSTcounter=0;
interrupt void SYST_Handler(void) {  
  SYSTcounter++;
}

Now to the weird part. The NVIC_INT_CTRL register was renamed by Ti and represents the ISCR of ARM. After executing the Code and waiting for the Countflag it has a Value of 0x67108867. The SysTick exception has a value of 15 --> 1111 which can be seen in VECACTIVE in the picture below. BUT the VECPENDING remains empty same for ISRPENDING. ISCR values and explanation of Bits

As far as my understanding goes something most probably some stupid setting I forgot prevents my Systick from being executed although it realises that it should be executed. My interrupts in general are working as an unexpected power loss triggers the FaultHandler on the next startup as desired.

Responsible for that should be this code in my startup.c file but to be honest I don't really know what it's doing. Also SYST_TESTING is set to 1.

#pragma DATA_SECTION(g_pfnVectors, ".intvecs")
void (* const g_pfnVectors[])(void) =
{
   (void (*)(void))((unsigned long)&__STACK_TOP),
                                            // The initial stack pointer
   ResetISR,                                // The reset handler
   NmiSR,                                   // The NMI handler
   FaultISR,                                // The hard fault handler
   IntDefaultHandler,                       // The MPU fault handler
   IntDefaultHandler,                       // The bus fault handler
   IntDefaultHandler,                       // The usage fault handler
   0,                                       // Reserved
   0,                                       // Reserved
   0,                                       // Reserved
   0,                                       // Reserved
   IntDefaultHandler,                       // SVCall handler
   IntDefaultHandler,                       // Debug monitor handler
   0,                                       // Reserved
   IntDefaultHandler,                       // The PendSV handler
#if (SYST_TESTING == 1)
   SYST_Handler,                           // The M0 System timer handler
#else
   IntDefaultHandler,                      // The M0 System timer handler
#endif
   ADC_Handler,  // ADC handler
   IntDefaultHandler,
#if(OWI_TESTING == 1) //
   OWI_Activation_Handler, // OWI_Activation_Handler, OWI Activation handler
#else
   IntDefaultHandler,
#endif
#if (COMBUF_TESTING == 1)
   COMBUF_Handler,                          // COMBUF RX handler
#else
   IntDefaultHandler,                       //
#endif
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
   IntDefaultHandler,                       //
};

Anybody got any Ideas?

c

embedded

interrupt

cortex-m

texas-instruments

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