Note: FLASH memory is a type of EEPROM. But when I say EEPROM, I exclude FLASH memory.

I have been checking many sources but could not find a clear cut answer on this.

From what I read, it looks like most ordinary EEPROMS -nowadays- utilize SPI or I2C protocols to read and write data. The op-code, address and the data all are sent bit-by-bit in a serial manner. Alternatively, parallel buses can be used in EEPROMs too, allowing us to read/ write a whole byte at a specific adress at once (although such design demands more pins).

About FLASH memory, I read that it is possible to "erase" -which is different than reading and writing- by blocks only. A block contains many pages and a page may contain many bytes. It is possible to read/ write at a specific byte in a NOR FLASH memory, but one can only read/ write by pages in case of NAND FLASH memory.

What I wonder is how the data is being written 'by pages'. Writing the whole page in one clock cycle would require a very large bus with too many lines, and writing the whole page bit-by-bit would require too much time. So, I think the page is being written byte-by-byte serially. But then comes the question, if we are able to write byte-by-byte, then why we cannot write/ read at a specific location in FLASH memory?

It looks like there is an iteration copying the content of a buffer into the physical page, but we could skip writing until we reach the desired position during the iteration. (This does not save us time tough. Maybe we write in extra just to consolidate/ secure the data in other adresses).

So what would you say on this?